Low-Power Deep Sub-Micron CMOS Logic
New - The strong interaction between the demand for increasing chip functionality and data-processing speeds, and technological trends in the integrated circuit industry, like e.g. shrinking device geometry, growing chip area and increased transistor switching speeds, cause a huge increase in power dissipation for deep sub-micron digital CMOS circuits. Low-Power Deep Sub-micron CMOS Logic, Sub-threshold Current Reduction classifies all power dissipation sources in digital CMOS circuits and provi
